Trial notes 3/20/06
First thing Whyte provided a correction to opening statements made by Furniss. Don’t recall exact wording, but something to the effect:
Micron is irrelevant to the case. No evidence is presented in regards to Micron.
Bryan Medlock continued with the testimony of Mr Murphy. For anybody but the hard-core electrical enthusiast, this was a very boring afternoon. But it had to be done. Murphy went through definitions of 14 technical terms which are contained in the claim language. Three were completed last week, the rest today. He covered (today): output driver, external clock signal, synchronous memory device, input receiver circuitry, operation code, precharge info, read request, block size info, access time register, output rising& falling edge and delayed lock loop.
Cal had to chuckle when they discussed the external clock signal. This goes back to very detailed discussions with Elixe regarding rise and fall waveforms. I was maintaining they had a ramp. That they were trapezoidal. And what do you know, Rambus’ expert talked about the DDR clock signals being trapezoidal. Ha, that made my day. How’s that for back-up. LOL
Murphy then discussed 8 claims:
‘105 #34, ‘918 #24, 33, ‘020 #32, 36 and 916 #9, 28, 40
Note, There were originally 10 claims. The 2 deleted are ‘120 #33 (precharge) and ‘863 #16 (sync mem op). That was always a big question for me as to why 2 claims on precharge. Now they deleted one of the two claims on precharge. The other claim is also a minor one.
Murphy spent most of the time on DLL, going through lots of schematics.
The CAS latency register was also covered in great detail. We’ll see how Hynix responds, as there’s been lots of discussion on this topic.
Nic- don't know when Teece is up. I'll ask.
