Trial Notes 4/13/06 Part 2
Stone on validity:
Validity is shown by choices and the people who made those choices. To H is was anticipated and obvious. Gelsinger article revealed the memory BW problem. Intel chose Rambus. The solution was not obvious to Intel.
Burden of Proof.
R: more than likely than not.
H: Highly probable- Why: Patents were issued by PO. We have system that decides which claims are issued. H called Taylor as expert witness to show patents are obvious, anticipated and don’t infringe. Why didn’t they call their engineer? Their engineer stated in memo that R is a new architecture.
On prior art:
Taylor yesterday: stated PO never seen Lofgren patent as prior art. 3.5 minutes later, when Stone questioned to this fact, Taylor couldn’t recall if PO seen Lofgren evidence. (It had) Taylor’s testimony changes time and time again.
Johnston paper was cited @ PO.
H found Lofgren patent application in G.B. Was not available to PO for ‘020 & ‘105.
Redwine came later, not cited in ‘105, but cited in ‘020 and claims were issued.
Stone goes through each patent and related prior art. May have missed some but, here’s what I got:
‘918: CVAX, Morgan Patent, Budde (cited earlier), iAPX432 (everything is on Budde – equivalent), Lofgren, (it and Grover are equivalent), Grover (cited), SCI papers (cited), Chappel (cited), iAPX432 (cited)
‘020: Redwine (cited), Novac (?), SCI papers, ?
’916 CVAX-Morgan, Chappel, Budde, iAPX432, Lofgren-Grover
‘863 CVAX, Novac, SCI papers
Trained examiners considered this prior art. Examiners review records of PA, and what’s listed in the patent application. H complains R submitted too much PA? R received 92 PA from H. R sent all 92 PA to PO. Who’s to blame?
On secondary considerations:
What is really obvious? The test for obvious is not to use hindsight. There are 5 secondary considerations (only caught 4).
1. Commercial success. H sold $18B world wide.
2. long felt need for solution. Intel needed solution to BW problem. There was a need A crisis was looming. Why was DDR successful- it uses R inventions.
3. Accepted. People took license, like Samsung.
4. Praise- It’s been said that it’s revolutionary. IEEE award – changed the way an entire industry looks at the memory interface.
On the bottleneck:
H says inventions never closed the bottleneck. H cites Hennessy book. Chart talks about access time not BW. H trying to trick you.
Stone shows R employee Steve Woo charts showing that the gap is widening. Stone provides the missing information. Steve graphs cpu speed vs. memory clock speed. A 533 MHz DDR2 device only has a 266 MHz clock speed. [LOL, that is a bit amusing. That’s a genuine sales pitch, bit we’ll take it.] To reduce latency is difficult. One solution is to make BW higher. [I see Stone done some homework. Ha.] Another Woo slide shows that it takes 4 DDR2 devices to provide same BW as one XDR device. Why does H like the DDR parts better? At approximately same cost, H can sell 4 times more parts. H makes more money. [LOL, funny, but we’ll take it]
How did DRAM get faster? Lee said they got 20x faster when using synchronous mem, mode reg, prog burst, double data rate, DLL, prefetch, and prog write with DDR2.
The bandwidth problem has been solved.
Did Taylor talk about secondary considerations? No When questioned seeing them in Murphy’s report Taylor replied: I have no idea.
On narrow bus:
H says all claims should be limited to a narrow multiplexed bus. Stone reads the passage “persons skilled in the art …”. As pins get cheaper, can increase pin count. The patent examiner considered the narrow bus. In 1997 examiner had patents divided into 2 groups: Multiplex and Access Time Register. Inventions 1 & 2 are not connected. Access Time Register does not require a narrow multiplexed bus.
Support in spec? Are features described? DLL, var block size … Taylor says no. You don’t see the word DLL, but jury instruction says need not use exact words. Karp saw support for inventions. 5 examiners verified patents. Did all examiners miss the point?
